Ruixin Gaoguang D35: A RISC-V Dataflow Physical-AI Chip with 128 GB VRAM and >90% Compute Utilization
Suzhou Ruixin Integrated Circuit Technology (苏州睿芯集成电路科技) has shipped its flagship Gaoguang D35 — a RISC-V dataflow physical-AI chip that entered mass production in June 2026 and made its first post-production public appearance at the 5th Global Digital Trade Expo (Hangzhou, Sep 23–27, 2026). The company was also named a compute-ecosystem partner of Qiyuan Robot (启元机器人) at the latter's product launch in Shanghai on September 20. Two independent Chinese media outlets published detailed coverage on the same day, giving us enough concrete claims to annotate.
The Memory Wall: Why Dataflow Matters
According to Ruixin's official product introduction, traditional von Neumann chips spend approximately 80% of their power on data movement and less than 30% on actual computation — the well-known memory-wall bottleneck. The Gaoguang D35 attacks this with an original dataflow intelligent architecture: data directly drives compute units rather than waiting for a control-flow instruction sequencer to dispatch operations. The claimed result is compute utilization above 90% — several times the AI inference task volume of comparable solutions at the same power envelope.
Architecture: RISC-V CPU + LPU Heterogeneous Design
The D35 pairs a fully self-developed RISC-V CPU core with a dedicated LPU (Dataflow Processing Unit) in a heterogeneous design:
| Component | What Ruixin discloses |
|---|---|
| ISA | Fully self-developed RISC-V CPU core; passed technical certification by an unnamed “international semiconductor giant” and entered its global procurement system |
| Compute paradigm | Dataflow intelligent architecture: data-arrival-triggered computation vs control-flow instruction-driven; data directly drives compute units |
| Heterogeneous units | RISC-V CPU core + dedicated LPU (Dataflow Processing Unit); CPU handles control and orchestration, LPU handles dataflow execution |
| Memory | 128 GB large VRAM + high-bandwidth memory interface on a single chip; enables large-parameter AI models deployed locally at the edge without cloud upload |
| Packaging | Chiplet advanced packaging; allows flexible compute-tier configuration for different application scenarios |
| Software | Full-stack software toolchain supporting mainstream deep-learning frameworks and LLM inference deployment |
| Team background | Core team from IBM and Intel; R&D staff >70%; 10+ years of dataflow experience; 80+ patents in dataflow architecture |
| Academic recognition | Core research received an ISCA 2026 best-paper nomination — one of the earliest teams in China to systematically industrialize dataflow architecture |
Five Target Scenarios
Ruixin positions the D35 as a “physical AI” chip (as opposed to cloud general AI): single-chip edge deployment with millisecond response, no cloud upload required. The five core scenarios are:
| Scenario | What Ruixin describes |
|---|---|
| Smart security (智能安防) | Edge-side video analytics, facial recognition, behavior detection with large-model inference running locally |
| Industrial inspection (工业质检) | Real-time defect detection on production lines; dataflow architecture claimed to handle high-throughput visual inspection pipelines |
| Embodied robots (具身机器人) | On-robot perception and decision; Qiyuan Robot partnership (announced Sep 20, 2026) targets this segment specifically |
| Autonomous driving (自动驾驶) | Edge inference for perception fusion and path planning; local deployment avoids latency and privacy issues of cloud-dependent AD systems |
| Smart storage (智能存储) | AI-accelerated data management, intelligent tiering, and predictive maintenance in storage systems |
Qiyuan Robot Partnership (Sep 20, 2026)
At Qiyuan Robot's product launch event in Shanghai on September 20, 2026, Suzhou Ruixin was formally named a compute-ecosystem partner. The partnership centers on Ruixin's RISC-V + dataflow architecture supplying AI compute for Qiyuan's embodied-robot lineup. Ruixin's RISC-V CPU core has passed the technical certification of an unnamed international semiconductor giant and entered its global procurement system — a claim that, if verified, would mark a significant commercial milestone for a Chinese RISC-V core in a tier-1 supply chain.
Where Dataflow Architecture Fits in the RISC-V Landscape
The D35 is not the only dataflow or compute-in-memory RISC-V project we track, but it is the first to reach mass production with this combination of claims:
- NanoCore 3D-CIM (Hangzhou, covered September 9): 3D compute-in-memory with DRAM near-memory + SRAM CIM + RISC-V, still pre-commercial (C1 round closed).
- CONVOLVE Chimera (TU/e, covered September 9): RISC-V host + memory-centric and neuromorphic accelerators, validated on fabricated silicon but research-oriented.
- SpacemiT K3 (covered September 20): homogeneous-fusion AI CPU with 60 TOPS (INT4 sparse), conventional control-flow architecture with RVV + IME matrix extensions.
Ruixin's claim is that dataflow beats control-flow on inference efficiency by eliminating the instruction-fetch and dispatch overhead that consumes most of a von Neumann chip's energy budget. The ISCA 2026 best-paper nomination suggests the academic community finds the architecture worth engaging with. What remains unverified is whether the 90%+ utilization holds across real-world workloads with irregular memory access patterns, branching, and dynamic tensor shapes — all of which have historically challenged dataflow machines.
What to Verify and What Remains Open
- “International semiconductor giant” certification. Ruixin does not name the company. Until the partner is disclosed, this claim cannot be cross-checked.
- >90% compute utilization. This is an architecture-level claim about dataflow vs von Neumann efficiency. Real-world utilization on production models (LLM decode, transformer attention with variable sequence lengths, dynamic batching) is the test that matters.
- 128 GB VRAM. The capacity figure is stated; bandwidth, latency, and whether it is HBM-style stacked memory or a different technology are not disclosed.
- Process node and power envelope. Not published. The D35's competitive position depends heavily on these numbers.
- Benchmarks. No third-party benchmark results (MLPerf, SPEC, or custom) have been published. The ISCA 2026 nomination is for academic research, not a product audit.
- Software toolchain maturity. “Full-stack” and “mainstream frameworks” are vendor claims; the actual operator coverage, quantization flow, and model-import compatibility remain to be tested.
苏州睿芯高光D35:RISC-V数据流物理AI芯片深度解读
苏州睿芯集成电路科技有限公司的旗舰产品高光D35于2026年6月正式量产,是一款基于RISC-V指令集的数据流物理AI芯片。9月20日,睿芯在上海启元机器人发布会上被正式授牌为算力生态合作伙伴。9月23日至27日,D35将在杭州第五届全球数字贸易博览会上首次亮相。
记忆墙问题:数据流架构的出发点
据睿芯官方介绍,传统冯诺伊曼芯片约80%的能耗消耗在数据搬运上,实际计算不到30%——这就是著名的“记忆墙”瓶颈。高光D35采用独创的数据流智能架构:数据直接驱动计算单元,而非等待控制流指令调度器分发操作。厂商声称算力利用率可达90%以上,在同功耗下的AI推理任务量是同级方案的数倍。
架构:RISC-V CPU + LPU异构
D35采用全自研RISC-V CPU内核,配合专用LPU(数据流处理单元)的异构设计:
- ISA:全自研RISC-V CPU内核,已通过“国际半导体巨头”技术认证并进入其全球采购体系
- 计算范式:数据到达触发计算(dataflow)vs 指令驱动控制流(control-flow)
- 存储:单芯片128GB大显存 + 高带宽内存接口,支持大参数AI模型本地部署
- 封装:Chiplet先进封装,可根据不同场景灵活配置算力档位
- 软件:全栈软件工具链,支持主流深度学习框架与LLM推理部署
- 团队:核心成员来自IBM、Intel;研发人员占比70%以上;数据流领域10年以上经验;80余项专利
- 学术:核心成果获ISCA 2026最佳论文提名
五大应用场景
高光D35定位为“物理AI”芯片(非云端通用AI):单芯片本地部署大模型,无需上传云端,毫秒级响应。五大核心场景:
- 智能安防:边缘视频分析、人脸识别、行为检测
- 工业质检:实时缺陷检测、高吞吐视觉检测流水线
- 具身机器人:机器人端感知与决策;9月20日与启元机器人签署算力生态合作
- 自动驾驶:边缘感知融合与路径规划推理,避免云端依赖的延迟与隐私问题
- 智能存储:AI加速数据管理、智能分层与预测性维护
待验证与开放问题
- “国际半导体巨头”未公开名称,无法交叉核对
- 90%+利用率是架构级声称,真实世界负载(LLM decode、动态batching、不规则记忆访问)的实际利用率是关键考验
- 128GB VRAM的带宽、延迟、具体技术标准未披露
- 制程节点与功耗包络未公布
- 无第三方基准测试(MLPerf、SPEC等)
- 软件工具链成熟度待实际验证
高光D35是中国RISC-V生态中一个值得关注的数据点:首款量产的数据流RISC-V芯片,128GB本地存储,带有一线机器人合作伴关系。但厂商声称与独立验证事实之间的差距仍然很大。本文将在基准测试、认证合作伴或制程功耗信息公开后更新。
Резюме (RU)
Suzhou Ruixin выпустила флагманский чип Gaoguang D35 на базе архитектуры RISC-V + dataflow. Полностью самостоятельно разработанное ядро RISC-V прошло техническую сертификацию «международного полупроводникового гиганта» (название не раскрыто). Чип оснащён выделенным LPU (блоком обработки потока данных), 128 ГБ VRAM, упаковкой Chiplet. Заявленная эффективность использования вычислительных ресурсов — >90%. Массовое производство началось в июне 2026. Ключевые исследования получили номинацию на лучшую статью ISCA 2026. Все цифры — заявления производителя, независимая проверка отсутствует.
Resumen (ES)
Suzhou Ruixin ha lanzado su chip insignia Gaoguang D35, un chip de IA física con arquitectura dataflow basado en RISC-V que entró en producción en masa en junio de 2026. El diseño empareja un núcleo RISC-V completamente autodesarrollado con una unidad de procesamiento dataflow (LPU) dedicada, 128 GB de VRAM en un solo chip, empaquetado Chiplet avanzado y una eficiencia de computación reclamada del >90%. La investigación central recibió una nominación al mejor artículo de ISCA 2026. El 20 de septiembre de 2026, Ruixin fue nombrado socio del ecosistema de computación de Qiyuan Robot. Cinco escenarios objetivo: seguridad inteligente, inspección industrial, robots encarnados, conducción autónoma y almacenamiento inteligente. Todos los datos son reclamaciones del fabricante sin verificación independiente.
Résumé (FR)
Suzhou Ruixin a commercialisé son chip phare Gaoguang D35, une puce d’IA physique à architecture dataflow basée sur RISC-V entrée en production de masse en juin 2026. Le design associe un cœur RISC-V entièrement développé en interne à une unité de traitement dataflow (LPU) dédiée, 128 Go de VRAM sur une seule puce, un packaging Chiplet avancé, et une utilisation calculatoire revendiquée de >90 %. La recherche principale a été nominée pour le meilleur article à ISCA 2026. Le 20 septembre 2026, Ruixin a été nommé partenaire de l’écosystème de calcul de Qiyuan Robot. Cinq scénarios cibles : sécurité intelligente, inspection industrielle, robots incarnés, conduite autonome et stockage intelligent. Tous les chiffres sont des déclarations du fabricant sans vérification indépendante.
Zusammenfassung (DE)
Suzhou Ruixin hat seinen Flaggschiff-Chip Gaoguang D35 auf den Markt gebracht — ein RISC-V-Dataflow-Physical-AI-Chip, der im Juni 2026 in Massenproduktion ging. Das Design kombiniert einen vollständig selbstentwickelten RISC-V-CPU-Kern mit einer dedizierten LPU (Dataflow-Verarbeitungseinheit), 128 GB VRAM auf einem einzigen Chip, fortschrittlichem Chiplet-Packaging und einer angeblichen Rechenauslastung von >90 %. Die Kernforschung erhielt eine Nominierung für den Best Paper Award der ISCA 2026. Am 20. September 2026 wurde Ruixin zum Compute-Ökosystem-Partner von Qiyuan Robot ernannt. Fünf Zielszenarien: intelligente Sicherheit, Industrieinspektion, verkörperte Roboter, autonomes Fahren und intelligenter Speicher. Alle Zahlen sind Herstellerangaben ohne unabhängige Überprüfung.
خلاصه (FA)
شرکت Suzhou Ruixin چیپ پرچمدار خود گاگوانگ D35» را منتشر کرده است — یک چیپ هوش مصنوعی فیزیکی (Physical AI) با ارتباط dataflow و مبنی بر RISC-V که در جون 2026 وارد تولید انبوه شد. طراحی یک هسته مرکزی RISC-V کاملاً خودساخته را با یک واحد پردازش دادهجریان (LPU) مجزاع میکند، همراه با 128 گیگابایت VRAM، بستهبندی پیشرفته Chiplet و بهرهوری محاسباتی اعلامشده >90%. پژوهش اصلی برای بهترین مقاله ISCA 2026 نامزد شد. در 20 سپتامبر 2026، Ruixin به عنوان شریک اکوسیستم پردازش Qiyuan Robot معرفی شد. پنج سناریو هدف: امنیت هوشمند، بازرسی صنعتی، رباتهای جسمانی، رانندگی خودکار و ذخیرهسازی هوشمند. همه ارقام، ادعای سازنده بدون تایید مستقل است.
Sources / 参考来源
- cnstock.com — 苏州睿芯成为启元机器人算力生态合作伴伴 (2026-09-20 17:23)
- tidenews.com.cn — 高光D35:全球领先的RISC-V数据流物理AI芯片 (2026-09-20 10:23)
- ISCA 2026 — International Symposium on Computer Architecture (conference where the best-paper nomination was made)
- NanoCore 3D-CIM — our 2026-09-09 article (comparable compute-in-memory RISC-V project)
- CONVOLVE Chimera — our 2026-09-09 article (comparable dataflow RISC-V research project)
- SpacemiT K3 Preview Paper — our 2026-09-20 article (control-flow AI CPU comparison point)