AI Enters WCH's Official Toolchain: MRS II Connects to DeepSeek Harness

On September 19, a user on the WCH official forum posted screenshots of MRS II - MounRiver Studio II, WCH's official IDE for QingKe RISC-V cores - running with a DeepSeek harness attached. The post itself is short: pictures of the working setup, and a next step the author set for himself - testing whether the assistant can be integrated natively into the MRS UI rather than running alongside it.

Why this small post matters

Vendor IDEs have been the conservative corner of embedded tooling: they ship a compiler, a debugger, a flash tool, and rarely more. Seeing the WCH community wire a modern LLM into the official IDE for CH32-class development signals where the workflow is heading - the ask-generate-flash loop, with WCH-Link doing the flashing, compresses bring-up time in a way that documentation alone never could.

MRS II bundles the toolchain WCH maintains for its QingKe cores (the CH32V003 through CH32V208/V307/V317 and the newer CH32H417), so an LLM working inside that environment has, in principle, the whole edit-build-debug loop within reach.

Using it without fooling yourself

LLM assistance on MCU register-level code needs the same discipline as junior engineers do:

• Treat generated register writes as suggestions. Verify them against the reference manual for the exact part - the QingKe PFIC, SYSTIMER and HPE details differ across CH32V003, CH32V307 and CH32H417, and models blur them unless pinned down.
• Anchor prompts to the exact part number and SDK version. "CH32V307 EVT x.x, standard peripheral library" beats "WCH MCU" by a wide margin.
• Keep a verified snippet library. Once a generated routine passes on hardware, commit it to your own repository; that library, not the model, becomes your real accelerator over time.

What to watch

The open questions are the interesting ones: whether WCH ships a first-party AI panel inside MRS II, and how well DeepSeek-class models handle QingKe-specific CSRs and attributes - the fast-interrupt attribute and the PFIC register map are far less represented in public code than ARM's NVIC equivalents, which is exactly where model-generated code tends to drift. Community testing, like the post above, is how those gaps get mapped.

We track toolchain maturity for WCH and SpacemiT parts on open-riscv.com - from MRS II on the MCU side to the upstream kernel and toolchain work landing for K1 and K3 - since toolchain quality is what turns a cheap chip into a productive platform. Source:

• MRS II with DeepSeekHarness - community post with screenshots (wch.cn, Sep 19, 2026): https://www.wch.cn/bbs/thread-161367-1.html