CH32V307 DMA1 Channel 4 vs WCHNET Ethernet HardFault Case Study

A developer using the CH32V307VCT6 on the CH32V307V-EVT-R1 board ran into a reproducible HardFault when DMA1_Channel4 (used for I2S2 RX audio) and the WCHNET Ethernet library were both active. The case is a good example of how to isolate a resource conflict on a RISC-V MCU.

Setup

- MCU: CH32V307VCT6, LQFP100 - IDE: MounRiver Studio II V2.5.0 - Clock: 96 MHz HSE - Ethernet: built-in 10M PHY, WCHNET library version 0x1B - DMA: DMA1_Channel4 in circular mode, half-word, memory increment, mapped to SPI2/I2S2 RX

Symptom

Calling ETH_UDP_Poll() or ETH_UDP_SendAudio() after DMA1_Channel4 has been enabled triggers a HardFault with mcause = 0x00000004 (load address misaligned). The faulting address is inside the WCHNET library. Notably, the HardFault persists even after DMA1_Channel4 is stopped and de-initialized; only a reset clears it.

Isolation tests

The developer ran four clean tests: 1. DMA initialized but not started + WCHNET UDP send -> OK 2. DMA started + no WCHNET calls -> OK 3. DMA started + WCHNET UDP send -> HardFault 4. DMA stopped and de-initialized + WCHNET UDP send -> still HardFault

This proves the fault is triggered by the act of starting DMA1_Channel4, not by concurrent bus traffic.

What was ruled out - WCHNET uses the Ethernet MAC's dedicated DMA engine (ETH->DMAOMR, ETH->DMASR, etc.), not the general DMA1 controller. - The I2S DMA buffer and WCHNET MAC buffers were separated by about 2.5 KB, so there is no memory overlap. - DMA1_Channel4_IRQn (30) and ETH_IRQn (77) are distinct vector entries.

Additional DMA quirk observed

In normal (non-circular) mode, DMA1_Channel4 stopped at about 93.6% of the programmed transfer and the TC flag never set. Circular mode worked correctly for the audio stream. This appears to be an independent issue but is worth documenting.

Open questions

At the time of writing, WCH support had not yet replied with a definitive root cause. The community is asking whether: - the CH32V307 AHB bus has a known conflict between DMA1 and the Ethernet MAC, - the closed WCHNET library performs hidden DMA1 operations, - a documented workaround exists for simultaneous I2S2 RX DMA and Ethernet.

Practical advice

If your project needs both I2S2 RX audio and Ethernet on CH32V307, keep DMA1_Channel4 disabled during Ethernet initialization and test the exact startup order. As a last resort, use SPI/I2S without DMA or offload audio to a secondary MCU. We will update this note if WCH publishes an official explanation. Source: CH32V307 DMA1_Channel4 与 WCHNET 以太网库冲突问题